Data converters are provided for receiving either an analog signal for conversion to a digital signal or a digital signal for conversion to analog signal. For conversion of analog signals to digital signals, an analog-to-digital converter is utilized. This is typically facilitated by sampling an analog voltage onto a capacitor array having a plurality of binary weighted capacitors. The capacitors then have the ability to have one plate thereof selectively switched between a reference voltage and ground to redistribute the charge among the capacitors, the switching done in a sequential manner in accordance with a successive approximation algorithm. By selectively switching the plates of the capacitors, and comparing the other plate of the capacitors, which is connected to a common input of a comparator, to a reference voltage, a digital value for the analog voltage sampled at the input can be determined.
A number of problems exist with the data conversion of an analog signal to a digital signal. One problem is the speed of the data conversion. This is affected in part by the speed of the comparator used in the SAR conversion cycle. This comparator may be realized with a chain of comparators that are connected together in stages.